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APPLICATIONS INFORMATION: Continued
Layout Guideline
PCB layout plays a critical role in proper func-
tion of the converters and EMI control. In switch
mode power supplies, loops carrying high di/dt
give rise to EMI and ground bounces. The goal
of layout optimization is to identify these loops
and minimize them. It is also crucial on how to
connect the controller ground such that its op-
eration is not affected by noise. The following
guideline should be followed to ensure proper
operation.
1. A ground plane is recommended for mini-
mizing noises, copper losses and maximizing
heat dissipation.
2. Connect the ground of feedback divider, com-
pensation components, oscillator resistor and
soft-start capacitor to the GND pin of the IC.
Then connect this pin as close as possible to
the ground of the output capacitor.
3. The V CC bypass capacitor should be right
next to the Vcc and GND pin.
4. The traces connecting to feedback resistor
and current sense components should be short
and far away from the switch node, and switch-
ing components.
5. Connect the PGND pin close to the source of
the bottom MOSFET, and the SWN pin to the
source of the top MOSFET. Minimize the
trace between GH/GL and the gates of the
MOSFETs. All of these requirements reduce
the impedance driving the MOSFETs. This is
especially important for the bottom MOSFET
that tends to turn on through its miller capaci-
tor when the switch node swings high.
6. Minimize the loop composed of input capaci-
tors, top/bottom MOSFETs and Schottky di-
ode, This loop carries high di/dt current. Also
increase the trace width to reduce copper
losses.
7. Maximize the trace width of the loop con-
necting the inductor, output capacitors,
Schottky diode and bottom MOSFET.
Date: 1/21/05
SP6120 Low Voltage, AnyFET TM , Synchronous, Buck Controller
20
? Copyright 2005 Sipex Corporation
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